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BIST Built-In Self Test (Power4, IBM)
CIU Core Interface Unit (Power4, IBM, IC)
DERAT Data cache Effective to Real Address Translation [table] (Power4, IBM, CPU, ERAT)
EA Effective Address (Power4, IBM, CPU)
ERAT Effective to Real Address Translation [table] (Power4, IBM, CPU, EA, RA)
GCT Group Completion Table (Power4, IBM, CPU)
IERAT Instruction cache Effective to Real Address Translation [table] (Power4, IBM, CPU, ERAT)
IFAR Instruction Fetch Address Register (Power4, IBM, CPU)
LMQ Load Miss Queue (Power4, IBM, CPU)
LRQ Load Reorder Queue (Power4, IBM, CPU)
LSU Load/Store Unit (Power4, IBM, CPU)
PHB PCI Host Bridge (Power4, IBM)
RA Real Address (Power4, IBM, CPU)
RIO Remote Input/Output (Power4, IBM)
SDQ Store Data Queue (Power4, IBM, CPU, SRQ)
SLB Segment Lookaside Buffer (CPU, Power4, IBM)
SMI System Memory Interface (Power4, IBM)
SP Service Processor (Power4, IBM, IC)
SRQ Store Reorder Queue (Power4, IBM, CPU) Thanks for using V.E.R.A.
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